The proliferation of ultrahigh-speed 5/6G mobile networks6, edge cloud computing12, and the internet of things13 is exerting considerable pressure over existing hardware infrastructures connecting the wireless and fiber segments in communication networks. The solution to accommodating the ever-increasing demands of bandwidth, providing lower latency and reduced power consumption passes through extending the radiofrequency operation spectrum to the microwave and millimeter-wave regions and developing compact, flexible, and agile solutions capable of interfacing the radiofrequency (RF) and photonic domains. Microwave photonics14,15 (MWP), which uses optical devices and techniques to generate, manipulate, transport, and measure high-speed radio-frequency signals is one of the few technologies capable of supporting this evolution. Traditional RF systems and devices that process signals directly at frequencies fRF in the RF spectrum are static, bulky, vulnerable to electromagnetic interference (EMI), and have limited frequency bandwidth (see supplementary note 0). The translation of RF systems into the optical region of the spectrum by means of frequency up-conversion to the optical spectrum region fo (see supplementary note 0) brings the possibility of leveraging the advantages of photonic systems, which include tunability, broadband operation, immunity to EMI, and potential space weight and power (SWAP) gains. Most of these advantages have been proved in prior works where discrete photonic components such as lasers, optical fibers, filters, and detectors have been assembled to implement specific functionalities such as waveform generation16, beamforming17-19, filtering20-24, channelization25 and instantaneous frequency measurements26. Though interesting, these solutions are limited in terms of reliability, and repeatability and are still bulky and complex to engineer and operate. Therefore, their applicability to scenarios with massive takeovers and high volumes is severely hampered.
Many of the former limitations can be overcome by benefiting from the compact footprint, modularity, and scalable fabrication methods of integrated photonic circuits27-31. The convergence of the two fields, known as integrated MWP5,32,33 has allowed a dramatic reduction in the footprint and losses of complex MWP systems allowing a limited degree of reconfigurability. However, most of the integrated photonic microwave subsystems reported to date have been implemented as application-specific photonic integrated circuits (ASPICs), which are designed to optimally perform a particular functionality34-38. These chips usually require several fabrication cycles to achieve optimum performance, and this results in unacceptable long fabrication times and costs39. Furthermore, they are very sensitive to non-recurring engineering costs (NRE) as any change in systems specifications requires a new chip design. A way out is to leverage the strong push toward programmable photonic circuits that are also being developed for related application areas such as quantum photonics40-42, artificial intelligence43,44, neuromorphic computing45-47, and sensing48. In this context, two particular routes are being explored. In the first, circuits based on traditional interferometric and photonic waveguide structures are designed for flexible programming of its relevant parameters. The key elements are unit cells of Mach–Zehnder interferometers and ring resonators that can be activated individually to implement, reconfigurable delay lines49, beamformers50, waveform generators51 and filters52. The second is based on the possibility of implementing a generic signal processor or field programmable photonic gate array (FPPGA)2,3 where a photonic core made from a mesh of uniform tunable building blocks and surrounded by external high-performance blocks can be easily programmed to support multiple functions53, 54 by software definition. The successful development of this approach requires solving an extremely challenging and complex technology stack problem1,3,4 comprising not only the photonic processing layer but also an electronics layer providing driving, monitoring, and control, and a software layer for optimization and programming. While to the best of our knowledge, this has not been demonstrated so far, the gains that could be achieved are huge in terms of ultra-high bandwidth, high-speed operation, flexibility, low power consumption, and reduced fabrication costs from leveraging economies of scale. All these will be obtained while operating in a complementary and synergistic way with electronic processors. These gains will have a strong impact in meeting and surpassing the stringent requirements of mobile-based applications as they will enable a new generation of compact, broadband, and programmable devices ready to be allocated both in central and base stations.
Here we report the first general-purpose scalable programmable photonic processor with the remarkable capability to implement all the main functionalities required in a microwave photonic system by suitable programming of its resources. The processor is fabricated in a silicon photonics platform and incorporates for the first time to our knowledge the full photonic/electronic and software stack. We leverage recent advances in advanced waveguide mesh designs and optimization algorithms53,54, to enable software-defined functionality programing at reconfiguration speeds of several microseconds. With the proper development of attached modulators and photodetectors, the operation bandwidth of this processor can surpass the millimetre wave band featuring power consumption values in the order of a few watts. The possibility of implementing all the functionalities with a single chip opens the path to scale down the processor size to dimensions compatible with the requirements of next-generation millimeter-wave base stations and satellites6,7.
We anticipate that will be useful in an unconstrained number of custom applications such as photonic computing8, advanced communications9, lidar10, and microwave spectroscopy11 much in the same way as FPGAs support multiple applications in the electronic domain.
RF-photonic operations and functionalities
RF-Photonics can support all the main functionalities needed by current and future application scenarios in communications, computing, and sensing. Figure 1 shows a selection of some of them covering terrestrial, space, and airborne scenarios with very different requirements in terms of operation frequency, power consumption, and footprint. It is precisely the added value of reconfigurability that enables this unique feature of spanning this variety of requirements as well as adaptative-demanding applications. A list of the main 12 functionalities required in these systems with a description and hosting locations is provided in Table 1. The table also provides an indicative limited selection of publications reporting their ASPIC implementation. The interested can find an exhaustive list of references reporting ASPIC implementations of MWP functionalities elsewhere11.
The general-purpose photonic processor
The general-purpose photonic processor presented in this work aggregates, for the first time, the complex full-stack necessary to operate a programmable photonic device: the optical layer, the control layer, and the software layer (Fig 2a). The photonic stage is integrated on a silicon-on-insulator chip that includes a reconfigurable core of 72 Programmable Unit Cells (PUC) distributed in a flatted hexagonal mesh topology56 (Fig 2b). In addition, the chip includes an optoelectronic monitoring unit array that provides feedback on the optical power at each port and four high-performance filters. The chip is connected optically through a fiber array with 64 ports (Fig 2c), from where 28 are routed to the mesh core and electronically through a wire bonding interconnection to a Printed Circuit Board (PCB).
On the optical layer, the chip is optimized for C-band operation. As described in Fig 2b and shown in Fig 2d, the mesh core has 40 output ports, 12 connected to on-chip high-performance blocks (2 lattice filters of order 4, 1 coupled-ring filter, and 1 Ring-assisted MZI filter of order 4). As described before, each PUC consists of a Mach-Zehnder Interferometer (MZI) with two thermo-optic phase actuators. By tuning one of the arms, the user can modify the coupling factor of the 2x2 block. For independent coupling factor and phase response configuration, the user/system can configure both arms57. The insertion loss and efficiency have been characterized across many chips and two wafers, resulting in 0.48 dB/PUC and 1.3 mW/π, respectively. The length and basic delay unit are also characterized as 811 um and 11.25 ps. Propagation losses are measured between 1.5 and 2.5 dB/cm for different waveguide widths and dies. Finally, fiber-chip coupling loss ranges between 1.5 dB to 3 dB, for different coupling techniques. For the scope of this paper, we employed a device with 3 dB loss per facet.
On the electronic layer, 304 on-chip phase actuators are controlled by a board-integrated programmable current array source connected to the Logic Unit (LU) (Fig. 2c & 2e). Similarly, 40 on-chip photodetectors are measured through an on-board readout system connected to the logic unit. Closing the workflow, the software running in the LU actuates over the photonic system and can get instant data of the circuit configuration. The overall operation (set and readout times) is dominated by the driving unit, setting the reconfiguration time of the system to 15-90 ms.
Finally, the software layer includes the backend functions necessary to maintain the chip temperature stable, drive and read from the photonic electro-optic components, and the application layers that automate the configuration of applications at different abstraction levels. Additional information on the software layer can be obtained in Supplementary Note 1.