Overview of vdW in-plane homojunction photodiode for HDR in-sensor image processing. The optical dynamic range (DR) of an image sensor is defined as3, 13, 32:
$${\text{DR(dB)}}=20\lg \frac{{{P_{{\text{max}}}}}}{{{P_{\hbox{min} }}}}$$
1
where Pmin and Pmax denotes the maximum signal level that the sensor can detect before saturation and the minimum detectable signal level above the sensor's noise floor, respectively. Notably, a definition of ten times ratio of Pmin and Pmax in log scale is also used to define DR10, 33, 34. The LDR represents the power range within which a photodetector maintains a linear response to incident light. A large LDR allows the photodetector to accurately capture the scenes with huge illumination difference using single exposure, resulting in detailed high-quality images. Supplementary Fig. 1a presents the general illuminance (E) (also converted as Ф with the maximum eye sensitive wavelength of 555 nm35) in daily life provided under various conditions like starlight, full moon, dusk, dark clouds, cloudy daylight and sunny noon. Typical modern CMOS image sensors in digital cameras and smartphones usually have a DR of around 60 to 80 dB3. Current near-sensor even-based camera has DR of 120 dB22. In contrast, human eyes have a DR about 140 dB36 through the visual adaptation of retinal cells and adjustment of the pupil diameters, a remarkable ability to adapt to various lighting conditions, although this process of light/dark adaptation takes a long time35 (~ 1 min/30 min, Supplementary Fig. 1b). To capture images when entering/exiting tunnels by a single senor for a high-speed vehicle, the sensor must possess an LDR exceeding 100 dB37–39. Otherwise, the resulting images will be distorted (such as Fig. 1a (i)), leading to the information loss in the conventional machine vision together with possible latency in high-speed movement. In our case, to perform high-performance in-sensor visual processing, each pixel of the imaging sensor comprises subpixels, such as 3×3 array (the red dashed rectangle in Fig. 1a (ii)). Each subpixel consists of an electrostatic screening enabled reconfigurable HDR WSe2 homojunction photodiode (Fig. 1b (i)) exhibiting p++-p junction and n++-p junction at positive and negative gate voltage, respectively (Fig. 1b (ii)). The large LDR of the device (122 dB/144 dB, red/blue line in Fig. 1b (iii)) completely covers the luminance range insid and outside the tunnel. And the ultrafast response speed of this photodiode (8 ns) also ensures the real-time imaging capability. As shown in Supplementary Fig. 2a, each subpixel receives incident light with an intensity of Pj. The output photocurrent (Iph) of each pixel is obtained by summing the photocurrents from all the subpixels (Iph = ∑PjRj), where Rj represents the photoresponsivity of the subpixel. The photoresponsivity, which is analogous to the weight of the kernel matrix, can be adjusted by applying a gate voltage, enabling control over both the amplitude and polarity. Fine adjustments to the polarity and responsivity of these subpixels allow the pixel to function as an image processing operator, realizing high fidelity, high precision, and low latency in-sensor visual processing tasks (compared to conventional off-sensor processor, Supplementary Fig. 2b) like edge extraction of a forward truck, as demonstrated in Fig. 1a (iii).
Device structural characterization and electrical properties. Our photodetector with a gate-tunable photoresponsivity and a large physical LDR was achieved by leveraging a local electrostatic screening-enabled WSe2 in-plane homojunction. Figure 2a presents the schematic of the device. A SiO2/Si slice is used as the substrate, where the Si acts as a bottom gate electrode. A dry transfer method was employed to fabricate the WSe2/PdSe2/h-BN van der Waals stacks. Detailed information on the device fabrication can be found in the Methods. Figure 2b shows the optical microscopy image of the device, with the WSe2, PdSe2, h-BN edges marked with red, purple, and green dotted line, respectively. The introduction of a 2D insulating layer material, h-BN, between the WSe2 and SiO2 was intended to improve the interfacial contact between them40, 41. The thicknesses of each layer, h-BN, PdSe2, and WSe2, were measured by an atomic force microscope (AFM) (Fig. 2c), yielding measurements of 16, 154, and 27 nm, respectively. We further examined the Raman spectra of the stacking crystals, which are presented in Supplementary Fig. 3. The characteristic peaks corresponding to h-BN, PdSe2, and WSe2 are clearly observed in the spectra. Additionally, the clean interface between these 2D materials was confirmed by high-resolution transmission electron microscopy (HRTEM) characterizations and corresponding energy-dispersive spectrometry (EDS) mapping on the cross-section of the fabricated heterostructure. (Supplementary Fig. 4).
The current-voltage curves of the heterostructure, specifically between the source electrode (1) and drain electrode (4), under various gate voltages (− 80 V and 80 V), are displayed in Fig. 2d, g. The two curves exhibit obvious typical rectification characteristic with reversed polarity. As shown in Supplementary Fig. 5a, b, the polarity and rectification ratio of the device can be dynamically modulated by the gate voltage. The excellent rectification characteristics of the device are further emphasized by the maximum rectification ratios of the photodiodes, which are 3×105 at Vgs = 80 V and 7×103 at Vgs = − 80 V, respectively (Supplementary Fig. 5b). Moreover, the ideality factors are extracted by fitting the forward current of the device utilizing a modified form of the Shockley diode formula expressed by Lambert W function23, 42. The ideality factors are extracted as 1.4 (Vgs = − 80 V) and 1.2 (Vgs = 80 V), respectively (Supplementary Fig. 5c). These ideality factors approaching 1 indicate that the forward current flow process in the device is mainly dominated by carrier diffusion rather than carrier recombination43, 44.
In order to elucidate the underlying mechanism behind the observed rectification behavior, the contact properties between metal electrode and WSe2/PdSe2 were measured, as presented in Supplementary Fig. 6a, b. The both near linear current-voltage curves indicate a quasi-ohmic contact45 characteristic between separate electrodes of WSe2 and PdSe2, suggesting that the rectification behavior is independent of the metal contacts. It is worth noting that the PdSe2 flake exhibits a high carrier concentration of 1018 cm− 3 at 300 K46, corresponding to the large Ids (~ 10− 6 A at Vds = 0.1 V) in the output and transfer curves of the PdSe2 flake-based transistor (Supplementary Fig. 6b, d). This high carrier concentration in the PdSe2 flake effectively screens the electric field originating from the bottom gate47, preventing the modulation of the carrier concentration and polarity in the WSe2 layer above the PdSe2 flake. Conversely, the carrier concentration and polarity in the WSe2 layer above the SiO2 insulator can be effectively adjusted using the bottom gate voltage (Supplementary Fig. 6a, c). Consequently, a homojunction is formed between the WSe2 layer above SiO2 and the WSe2 layer above PdSe2 flake, enabling gate-tunable characteristics observed in the device. Figure 2e–i illustrates the band-alignments under various bias conditions. Details of the band-alignment discussion can be found in Supplementary Fig. 7–8. When the gate voltage (Vg) is set to − 80 V, the Fermi energy (EF) of the WSe2 layer above SiO2 shifts toward the valance band edge (EV), while the EF of the WSe2 layer above PdSe2 flake remains unaltered (slightly shifted towards the EV). As a consequence, an in-plane p++-p homojunction of WSe2 is formed (Supplementary Fig. 9a). As can be seen in Fig. 2e, f, Vds < 0 V represents the forward bias condition, whereas Vds > 0 V corresponds to the backward bias of a diode. Moreover, owing to the bipolar characteristics (Supplementary Fig. 6c), the WSe2 in-plane homojunction can also be modulated by gate voltage from p++-p junction to n++-p junction. Specifically, when Vg is set to − 80 V, the EF of WSe2 shifts toward the conduction band edge (EC), resulting in the formation of an n++-p homojunction (Supplementary Fig. 9b). In this case, Vds > 0 V signifies the forward bias condition, while Vds < 0 V corresponds to the backward bias of a diode, as depicted in Fig. 2h, i.
Photoresponse of the in-plane homojunction photodiode. The presence of gate-tunable polarity of rectification in the device allows gate bias tuning polarity and values of the photocurrent or responsivity R. This capability is crucial for in-sensor visual processing. The photoresponse of the device was measured at 520 nm. Figure 3a presents the Ids–Vds curves under light illumination at different gate voltages (–80 V and 80 V). The device demonstrates a positive photoresponse when Vg is set to − 80 V, while it exhibits a negative photoresponse at Vg = 80 V. This behavior can be attributed to the reverse of the internal electric field caused by the gate voltage. Moreover, the positive and negative photocurrents generated in the device are stable as can be seen from the short circuit current (Isc)-time curves under modulated light illumination (Fig. 3b). Furthermore, we have fabricated several devices with identical structures, which exhibit similar gate tunable photoresponses, as demonstrated in Supplementary Fig. 10. This high reproducibility of positive and negative photoresponses across multiple devices verify the reliability of the observed phenomena. Except the polarity of the photocurrent, the amplitude of the photocurrent can also be adjusted by the gate voltage, as depicted in Fig. 3c. Thus, the gate voltage servers as a control parameter that enables modulation of both the polarity and magnitude of the photocurrent.
In order to gain deeper insights into the photoresponse mechanism, photocurrent mappings were conducted. The photocurrent mappings at − 80 V and 80 V are shown in Fig. 3d, g, respectively. The region exhibiting photosensitivity is located near the edge of the WSe2/PdSe2 heterojunction, encompassing an approximate area of 144 µm2 (indicated by the white dashed area in Fig. 3d, g). The result indicates that the built-in electric field is confined to the edge of the WSe2/PdSe2 region. The photocurrent mapping at zero gate voltage (Supplementary Fig. 11) excludes the possibility of metal-semiconductor Schottky barrier and WSe2/PdSe2 heterojunction contributing to the photoresponse. Furthermore, the spectral response (Supplementary Fig. 12a) and unpolarized photoresponse (Supplementary Fig. 12b, c) of the device confirm that the light absorption of the device is primarily attributed to the multilayer WSe2. The gate-tunable conversion of Isc can be explained by the energy band diagrams (Fig. 3e, h). At Vg = − 80 V, the built-in electric field of the p++-p homojunction is directed towards the source. Consequently, the photogenerated electrons drift toward drain, while the photogenerated holes drift towards the source, resulting in a positive photocurrent. Conversely, at Vg = 80 V, the p++-p homojunction transforms into an n++-p homojunction (Fig. 3h), leading to the generation of a negative photocurrent.
It is worth noting that the approach creating WSe2 in-plane homojunctions using local electrostatic screening is a universal method. By replacing the thick PdSe2 flake with a thick graphite (Supplementary Figs. 12 and 13) or even a 50 nm Au electrode (Supplementary Figs. 14 and 15), we can achieve similar gate-tunable positive and negative photoresponse characteristics. The scanning photocurrent mapping of the WSe2/graphite (Supplementary Fig. 13a, c) and WSe2/Au (Supplementary Fig. 15a, c) stacks demonstrates that positive and negative photocurrents originated from the in-plane homojunction of WSe2. These results indicate that the PdSe2 is not necessary for the bipolar characteristic and thereby reversible photoresponse. However, its efficient band-alignment with WSe2 and less interface recombination inheriting from van der Waals nature contribute to the high performance of the WSe2 in-plane homojunction photodiode. In addition, we note that the large curvature of the stacking edge can also lead to strong local electric field which will further enhance the charge carrier transport across the junction48. However, such edge electric field enhancement that dominates the photocurrent spatial distribution is rule out by using a very thin graphite as screening layer (Supplementary Figs. 16 and 17). Our homojunction photodiode also has an ultrafast response time. To evaluate the response speed of the homojunction, we conducted measurements of the I-T curves. Detailed information on the response speed tests can be found in the Methods. The positive photoresponse exhibits a rise and fall times of 8 ns and 10 ns, respectively (Fig. 3f), while the negative photoresponse demonstrates rise and fall times of 8 ns and 9 ns, respectively (Fig. 3i). These values correspond to a 3 dB cut-off frequency above 20 MHz30. Furthermore, it is important to note that our device exhibits an ultra-fast response speed, surpassing that of most reported 2D heterostructure devices (refer to Supplementary Table S1). This characteristic is particularly significant for rapid in-sensor visual image processing with low latency.
In practical applications, achieving a linear response in photodetectors is crucial for accurately converting optical signals into electrical signals and avoiding distortion10. Additionally, compared with the sublinear relationship between photocurrent and light intensity observed in most 2D phototransistors, a photodiode with a linear relationship is more suitable for implementing in-sensor processing5, 8. To assess the linear photoresponse properties of the device, we conducted measurements to determine the relationship between the photocurrent and light intensity at various gate voltages. Figure 4a, b present the positive and negative photoresponses obtained under various light intensities from lowest 0.07 to highest 1.6×104 mW/cm2, with a bias voltage of 0 V. The extracted photocurrents as a function of light intensity are shown in Fig. 4c, d. Both positive and negative photoresponses exhibit linear behavior until deviating from linearity at higher light intensities. The photoresponsivity R is expressed as10:
where Iph is the photocurrent, Ф is the light intensity, and S is the photosensitive area. The photoresponsivities for positive and negative photoresponse remain constant initially but decrease at higher light intensities, as shown in Fig. 4c, d. In these cases, Pmin represents the noise equivalent power (NEP) without normalization to the bandwidth of measurement system (Supplementary Fig. 19). Consequently, the LDR at − 80 V Vg is 122 dB, while it reaches 144 dB at 80 V Vg. The insets of Fig. 4c, d visually illustrate the large LDR of the device, covering a wide illumination range from full moon to sunny noon conditions. This highlights its potential for HDR visual processing. Furthermore, we compared the photodetection performance, including response speed and LDR values, of our electrostatic screening enabled homojunction photodiode with other state-of-the-art 2D reconfigurable bipolar photodetectors (Fig. 4e, more detailed parameter comparisons are shown in Supplementary Table S1). The results indicate that our semi-screened-gate-controlled photodiodes combines ultrafast response speed and large LDR, which can be attributed to the structure of the multilayer WSe2 in-plane homojunction. This structure allows the device to avoid carrier recombination caused by interfacial defects.
HDR in-sensor image processing. The WSe2 in-plane homojunction photosensor offers the advantage of a large physical LDR and the ability to achieve positive and negative photovoltaic responses through gate voltage tunability. This allows us to implement in-sensor visual processing in scenes with a wide range of brightness levels. As a proof-of-concept, we simulated a driving scenario at a tunnel exit, where the illuminance contrast between the tunnel interior (less than 10 lx) and the exterior (over 105 lx) ~ 100 dB37–39. To enable visual processing, each pixel in the sensor is divided into a 3×3 subpixel array, corresponding to a 3×3 kernel matrix. By adjusting the gate voltage of each subpixel, the responsivity can be tuned from negative to positive, allowing for the implementation of various types of kernels. Figure 5a – c shows images generated using different kernels with high LDR detectors, including original image capture, edge detection, and emboss processing. Additional examples of in-sensor visual processing can be found in Supplementary Fig. 20. In comparison to non-HDR sensors (Fig. 5d-f), our device demonstrates a clear advantage in in-sensor visual processing, particularly in scenes with significant illuminance variation. This advantage stems from the large physical LDR of the WSe2 in-plane homojunction device, which cannot be replaced by software-based HDR processing techniques or conventional HDR CMOS image sensors.