The performance of LaAlO x gate dielectric films prepared by sol-gel method at different temperatures of annealing

doi:10.21203/rs.3.rs-4984081/v1

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The performance of LaAlO x gate dielectric films prepared by sol-gel method at different temperatures of annealing

https://doi.org/10.21203/rs.3.rs-4984081/v1

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In recent years, there has been growing interest in the exploration of rare earth oxides for their potential as high-k gate dielectrics. Lanthanum oxide (La₂O₃) has emerged as a particularly noteworthy candidate due to its impressive dielectric properties, wide bandgap, strong thermodynamic stability, and remarkable compatibility with silicon substrates. However, La₂O₃ has a significant problem for MOS device applications due to its hygroscopicity and low crystallization temperature, making it unsuitable for high-temperature treatment during fabrication. To improve its oxide quality, it can be doped. Al-doped La₂O₃ (LaAlO_x) thin films annealed at different temperatures were prepared on n-type Si substrates by sol-gel method and the effect of temperature variation on LaAlOx thin films as gate dielectrics were investigated in terms of root-mean-square, interfacial properties, and electrical properties. The findings indicate that the introduction of Al doping raises the crystallization temperature of La₂O₃. Additionally, it was observed that the root-mean-square roughness of the LaAlOx films decreases from 0.919 nm to 0.320 nm with an increase in annealing temperature from 500 to 700°C. XPS has the capability to assess the interfacial characteristics of LaAlO_x. It is evident that elevated temperatures promote the formation of M-O bonds, diminish film defects, and enhance the overall interfacial quality of the film. In addition, analyzed the electrical properties of the Al/ LaAlO_x/Si/Al metal-oxide-semiconductor capacitors The findings indicate that the samples annealed at 700°C exhibit favorable electrical characteristics, demonstrating a dielectric constant of 20.91 under a gate voltage of 1 V and a leakage current density of 3.54×10^− 3A/cm².

La2O3

sol-gel method

gate dielectric thin films

MOS capacitors

Prepared LaAlO_x thin films by sol-gel method and the effects of different annealing temperatures on the interface structure of the films were analyzed by XRD、AFM、XPS and so on.

Fabraicated the Al/LaAlO_x/Si/Al metal-oxide-semiconductor capacitors by RF magnetron sputtering, and the effects of different annealing temperatures on the electrical properties.

Annealed at 700 ℃, the RMS of the LaAlO_x film reaches a minimum of 0.320 nm and the content of M-O bond is higher. The lowest leakage current density of 3.54×10^-3 A/cm² is also reached at 700 °C.

Metal Oxide Semiconductor Field Effect Transistors (MOSFETS) are one of the core components of integrated circuits (ICs) because of their small size, high efficiency and low power consumption [1, 2]. It acts as a switch or amplifier in electronic devices, making digital logic operations possible. Advances in MOSFET technology have driven miniaturization and performance improvements in ICs, which have driven the development of robust and efficient electronic devices. Almost all electronic devices, from microprocessors to memory chips, use MOSFETs in ICs [3–5]. However, with the ongoing reduction in the size of MOSFETs, it becomes necessary to decrease the thickness of traditional silicon oxide (SiO₂) used as a gate dielectric in order to uphold adequate gate capacitance due to its low dielectric constant [6–8]. However, the thickness of SiO₂ gate medium can not be too thin. When the thickness of SiO₂ gate dielectric decreases to a certain value, the leakage current increases dramatically, and the performance of MOS devices deteriorates or even breakdown [9, 10]. Therefore, finding a material with a higher dielectric constant was necessary to replace the traditional SiO₂. In 2007, at the 45-nm technology node, Intel Corporation was the first to realize the use of HfO₂, a material with superior dielectric properties and exceptional stability, to replace SiO₂ as the gate dielectric material[2, 10]. However, although HfO₂ has been applied in practice, there is a need to explore alternative high-k materials to replace it due to its evident limitations [5, 11].

Lately, there has been a growing fascination with the utilization of rare earth oxides in high-k gate dielectrics. La₂O₃ has garnered significant interest as an exemplar of this. Due to its high-dielectric constant, lanthanum oxide also has a sufficiently large bandgap and higher conduction band offset, good thermodynamic stability, and excellent stability on Si substrates [12–14]. Therefore, La₂O₃ emerges as a top contender for the next era of high-k gate dielectrics. But La₂O₃ is unsuitable for high-temperature treatment during fabrication because of its low crystallization temperature, and its hygroscopicity is also a major problem for its MOS device applications. To improve its oxide quality, it has to be doped [15–17]. Some literature shows that Al doping of La₂O₃ to increase its crystallization temperature can effectively reduce the hygroscopicity of La₂O₃, improve its stability in air, and enhance its electrical properties [18–20]. Introducing Al-doped La₂O₃ has been shown to effectively enhance interface characteristics and improve the majority of desired high k properties [21–23].

At present, the sol-gel method can also produce high quality metal oxide semiconductors (MOS). This method is used in this paper because it is lower cost and easier to control the composition of the film. However, using sol-gel method to prepare the film also has its shortcomings, the quality of the film is affected by many factors such as temperature. To enhance the quality of the thin film, it is crucial to consider the annealing temperature [24, 25]. Currently, there is limited existing literature discussing the impact of annealing temperature on the structural and electrical characteristics of LaAlO_x gate dielectrics. This study involves the application of the sol-gel method to spin-coat high-k gate dielectric LaAlO_x thin films onto silicon substrates. The structural and dielectric properties of the samples were investigated at different annealing temperatures. AFM analyzed the LaAlOx films' root-mean-square (RMS), and the films' interfacial properties were analyzed by XPS core energy level spectroscopy. Furthermore, a thorough analysis was conducted on the capacitance-voltage (C-V) and leakage current-density-voltage (I-V) characteristics at high frequencies.

2.1 Preparation of precursor solution

A mixture of lanthanum nitrate and aluminum nitrate was dissolved in 2-methoxyethanol (C₃H₈O₂) solution (AR) with a La/Al molar ratio of 1:1, And added the same molar ratio of citric acid. The solution is heated and stirred for several hours to obtain a clear and transparent solution. It was aged at 25 ℃ for 48 hours.

2.2 Deposition and annealing of thin films

In the ultrasonic cleaning instrument, the N-type Si (100) substrate was cleaned with acetone, ethanol, 1% diluted hydrofluoric acid solution and ion cleaning machine at 25℃ in order to ensure Si substrate surface was clean and hydrophilic. The LaAlO_x solution was added to the Si substrate in drops, and then the substrate was placed on the spinning coating machine for spinning coating, the selected speed was 3000r/mim, and the spinning coating time was 30s. The spin-coated Si substrate is then placed on a heating table to bake the cured film and remove the solvent residue. Finally, the substrates were placed in a muffle furnace and annealed at 500, 600, 700, and 800°C for one hour. XRD compared the prepared lanthanum oxide films and lanthanum aluminate films. The surface of the films was analyzed, and their thickness was estimated using SEM. AFM analyzed the RMS of the films. The chemical states of each element in LaAlO_x thin film were analyzed by XPS, and then the structural changes of LaAlO_x thin film were studied. The charge correction was performed by C1s peak binding energy (284.8eV).

2.3 Fabrication and Characterization of MOS Devices

Al gate electrodes were deposited onto LaAlO_x films by magnetron sputtering using the shadow mask method to fabraicate the Al/LaAlO_x/Si/Al MOS capacitors. The semiconductor device analyzer was utilized to measure the high frequency capacitance-voltage (C-V) and leakage current density-voltage (I-V) characteristics of Al/LaAlO_x/Si/Al MOS capacitors.

3.1 Microstructure analysis

Figure 2 shows the XRD of La₂O₃ and LaAlO_x thin films deposited on Si substrate at 700°C. Based on some references, the La₂O₃ film is amorphous at 500°C. Its weak diffraction peaks will appear at 600°C at 2θ equal to 29.96° and 39.53° [14]. According to reports, high-k gate dielectrics featuring an amorphous structure are considered more appropriate for CMOS device applications due to the fact that polycrystalline materials with grain gaps tend to create current pathways leading to increased leakage currents and reduced device reliability [26]. A comparison of La₂O₃ and LaAlO_x films annealed at 700°C reveals that the LaAlO_x films do not show any obvious diffraction peaks, which indicates that aluminum doping does increase the crystallization temperature of La₂O₃, which is conducive to enhancing the dielectric properties of Al/LaAlO_x/Si/Al MOS capacitors at high-temperature states [27, 28].

The morphology of the thin film samples was examined using a scanning electron microscope (SEM) to analyze both their surface and cross-section. Figure 3 illustrates the SEM images of the cross-sectional views of LaAlO_x thin films following exposure to various heat treatment temperatures. The film thickness reduces from 40 nm initially to 35 nm as the annealing temperature increases. This could be attributed to the transformation of hydroxyl groups into oxides in the films fabricated using the sol-gel technique and the evaporation of organic solvents involved in the films [14]. As seen from the Mapping diagram of the LaAlO_x film, the La, Al, and O elements are consistent throughout the film.

The surface morphology of LaAlO_x thin films was analyzed using AFM. The images in Fig. 4 (a) and (b) depict the 2D and 3D AFM representations of the thin film samples, respectively. The RMS of the LaAlOx film after annealing at 500°C is measured to be 0.919 nm, and it decreases to a minimum of 0.320 nm when annealed at 700°C. Subsequently, the RMS increases to 0.539 nm when the annealing temperature reaches 800°C. This investigation replicates previous research, demonstrating that the annealing temperature significantly impacts surface roughness and grain size. A smoother gate dielectric layer resulting from a lower annealing temperature can effectively reduce interface trap density and enhance device performance The decrease in the RMS of LaAlO_x films from 500°C to 700°C may be because the films are initially disordered, and as the temperature increases, the films tend to be ordered, and the roughness decreases. The rise in the RMS of the films between 700°C and 800°C may be due to the tendency of the films to crystallize [19].

The chemistry at the interface is crucial for high-k/Si gate stacks, and precise identification of interfacial details will establish guidelines for choosing appropriate high-k gate dielectric materials for CMOS devices. The variation patterns of Si 2p, O 1s, La 3d, and Al 2p spectra of LaAlO_x/Si gate stacks with annealing temperature were determined by XPS measurements. Figure 5 shows the XPS measurement spectra of LaAlO_x thin films. XPS experiments were conducted on the film specimens under varying annealing temperatures. C 1s (284.8 eV) in amorphous carbon was selected for the core calibration, and it can be observed in the figure that five elements, namely, La, Al, O, C, and Si, were detected in the full XPS spectrum of the LaAlO_x film. It can be found that no peaks of other elements are detected except those of La, Si, Al, C, and O elements, indicating that Al has been doped into La₂O₃.

Figure 6 depicts the O1s core energy level spectra of LaAlO_x gate-dielectric thin films with Si gate stacks, illustrating variations in response to annealing temperature. At 530.15 and 531.31 eV, all O1s peaks are deconvoluted into two subpeaks. In the film the first one comes from the bond between M and O in the film, while the second one comes from the bond between M and OH [29]. The existence of M-OH in gate dielectric films typically results in the generation of trap and defect states within the film's band gap, which can cause a rise in leakage current and a reduction in breakdown voltage for electrical devices. Meanwhile, forming a higher percentage of M-O bonds can lead to better dielectric properties for the device. Based on the data in Fig. 6(e), it is evident that the concentration of M-O bonds rises as the annealing temperature increases. The presence of M-OH bonds diminishes as the annealing temperature rises, as indicated in Table 1. This phenomenon can be attributed to the increase in temperature leading to thermal condensation within the La-OH and Al-OH bond films, gradually transforming them into La -O and Al-O bonds. Consequently, this results in an increased coordination number of metal ions, thereby facilitating the bonding of metal ions with oxygen ions. It can also be seen that as the annealing temperature increases to 800°C, the fitted O1s peak shifts to the direction of high binding energy, indicating that LaAlO_x is fully oxidized and more silicate layers are formed, which will adversely affect the dielectric properties of Al/LaAlO_x/Si/Al MOS capacitors.

Figure 6(f) illustrates the La 3d spectra of LaAlOx thin films at various annealing temperatures. The spectra display a central peak (La 3d_5/2) and a spin-splitting peak (La 3d_3/2), with energy differences of approximately 16.80, 16.80, 16.90, and 17.00 eV from 500 to 800°C. Based on the available literature, it has been observed that the splitting energies of La3d_3/2 and La3d_5/2 are approximately 16.80 eV, indicating the presence of the La + state. [30]. At 700°C, the movement of the peaks towards lower binding energies suggests the existence of O-La-O bonds within the LaAlO_x films. However, with an increase in temperature to 800°C, there is a shift in binding energy towards higher values due to the close proximity of the La silicate layer to the interface with the Si substrate [14].

Table 1

Corresponding peak positions, half-height widths, and content percentages of each component of LaAlO_x gate dielectric films O 1s
Temperature		M-O			Vo
Temperature	Peak position (eV)	FWHM (eV)	Content percentage	Peak position (eV)	FWHM (eV)	Content percentage
500℃	529.97	2.29	74.6%	531.32	1.77	25.4%
600℃	530.03	2.18	78.7%	531.46	1.68	21.3%
700℃	529.47	2.51	83.3%	531.04	2.02	16.7%
800℃	529.89	2.5	87.7%	531.57	2.24	12.3%

MOS capacitors were fabricated using Al/LaAlO_x/Si/Al structure, where Al top electrodes with an area of 7.068×10^− 4 cm² were deposited on the LaAlO_x gate dielectric film via magnetron sputtering under shadowing, and Al back electrodes with the same thickness were applied to the backside of the silicon substrate. Figure 7 shows the variation curves of high-frequency (1 MHz) capacitance-voltage (C-V) with annealing temperature for the LaAlO_x gate-dielectric MOS capacitor with double-sweeping in the range of ± 8 V gate voltage. It is evident that the accumulated capacitance $\:{\text{C}}_{\text{o}\text{x}}$ exhibits a clear pattern of change as the annealing temperature increases. Initially, it rises with the annealing temperature, peaks at 700°C, and subsequently declines. The accumulated capacitances of LaAlO_x are 245.01, 332.31, 365.82, and 353.27 pF, respectively. By Eq. [31]:

$$\:\text{k}=\frac{{\text{C}}_{\text{o}\text{x}}\text{d}}{{{\epsilon\:}}_{0}\text{A}}$$

Where $\:{\text{C}}_{\text{o}\text{x}}$ is the accumulated capacitance, d is the film thickness, $\:{{\epsilon\:}}_{0}$ is the vacuum dielectric constant ($\:{{\epsilon\:}}_{0}$=8.854×10^− 12 F/m). The dielectric constants (k) of the samples annealed at 500°C, 600°C, 700°C, and 800°C were determined to be 15.73, 21.35, 20.91, and 20.79 respectively based on the area of the Al top electrode (A). The findings indicate that the effective dielectric constant (k) of the LaAlOx gate dielectric shifts from 15.73 for the annealed sample at 500°C to 20.79 for the annealed sample at 800°C, potentially attributed to the rise in annealing temperature. According to the XPS analysis, it is apparent that elevating the annealing temperature improves the interface quality and suppresses the expansion of low-k SiO_x interlayer [32].

Furthermore, the flat-band capacitance ($\:{\text{C}}_{\text{f}\text{b}}$) of the sample was used to calculate the $\:{\text{V}}_{\text{f}\text{b}}$, the EOT, the $\:{\text{Q}}_{\text{o}\text{x}}$and the electrical parameters such as the$\:\varDelta\:{\text{V}}_{\text{f}\text{b}}$, and the $\:{\text{N}}_{\text{b}\text{t}}$ in Table 2. The $\:{\text{V}}_{\text{f}\text{b}}$ is associated with the oxide charge density, while the hysteresis is linked to the boundary-trap oxide charge density.

Table 2

Electrical properties derived from C-V and I-V characteristics
Annealing Temperature	k	$\:EOT\left(nm\right)$	$\:{C}_{ox}\left(pF\right)$	$\:{C}_{fb}\left(pF\right)$	$\:{V}_{fb}$	$\:\varDelta\:{V}_{fb}$	$\:{Q}_{ox}\left({cm}^{-2}\right)$	$\:{N}_{bt}\left({cm}^{-2}\right)$	$\:{J}_{g}\left({A/cm}^{2}\right)$
500℃	15.74	9.96	245.01	61.09	-0.32	1.28	1.04×10¹²	2.77×10¹²	1.39×10^− 1
600℃	21.35	7.34	332.31	49.23	-0.72	0.32	2.35×10¹¹	9.40×10¹¹	2.17×10^− 2
700℃	20.91	6.67	365.82	44.88	-0.24	0.16	1.81×10¹²	5.17×10¹¹	3.54×10⁻3
800℃	20.79	6.91	353.27	40.84	-0.08	0.16	2.29×10¹²	4.99×10¹¹	8.84×10^− 3

The absolute value of $\:{\text{V}}_{\text{f}\text{b}}$ decreases as the annealing temperature increases. Films annealed at high temperatures exhibit reduced defects and traps, resulting in improved interface quality compared to films annealed at low temperatures. It is clear from Fig. 7 and Table 2 that the LaAlO_x films annealed at 700°C have less hysteresis. It can be inferred that the hysteresis phenomenon is connected to the trapping of oxygen charges at the boundary, which indicates that the interface properties of the doped lanthanum alumina thin film have been enhanced with the increase of annealing temperature. At a gate voltage of 1 V the I-V characteristics depicted in Fig. 8 indicate that the LaAlO_x films annealed at 700°C exhibit a minimum leakage current density of 3.54 × 10^− 3 A/cm². Raising the annealing temperature results in a higher surface density of the samples and improved adhesion of the film surface, leading to effectively reduced interfacial density of states and traps. The increase in $\:{\text{Q}}_{\text{o}\text{x}}$ values with rising annealing temperature may be attributed to the generation of oxygen vacancies in the film caused by higher annealing temperatures. The $\:{\text{N}}_{\text{b}\text{t}}$ values of samples annealed at higher temperatures appear to be relatively smaller compared to those annealed at 500°C. This could be attributed to the enhanced formation of denser gate dielectric films and higher-quality interfaces facilitated by the elevated annealing temperatures [20].

Nevertheless, as the annealing temperature was raised to 800°C, there was a noticeable rise in the leakage current density of the films. The findings suggest the electrical performances of LaAlO_x films are optimal when annealed at 700°C.

In brief, we conducted a systematic investigation into the impact of varying annealing temperatures on the RMS, interfacial and electrical properties of LaAlO_x high-k gate dielectric thin films prepared using the solution method. At 700°C, the RMS was minimized and the film's surface exhibited smoothness. XPS analysis reveals that the bonding between metal and oxygen increases while the bonding between metal and hydroxyl decreases with increasing annealing temperature. This suggests that the introduction of Al effectively suppresses the moisture absorption of La₂O₃, thereby preventing the formation of low-k SiO_x and enhancing the interface quality between the dielectric film and Si substrate. At the same time, this enhances the dielectric properties of the Al/LaAlO_x/Si/Al MOS capacitors. A semiconductor device analyzer found that higher annealing temperatures lead to an increase in the accumulated capacitance $\:{\text{C}}_{\text{o}\text{x}}$, resulting in a higher k value. Additionally, as the annealing temperature increases, the $\:{N}_{bt}$value decreases progressively due to the facilitation of denser gate dielectric film formation and improved interface quality. Raising the annealing temperature also leads to a decrease in leakage current density, with the lowest recorded value of 3.54×10^− 3 A/cm² observed at 700°C. In general, LaAlO_x films annealed at 700°C demonstrate outstanding characteristics attributed to enhanced interfacial chemistry and electrical properties, positioning them as potential choices for upcoming high-k gate dielectrics.

Funding

This research was supported by the Natural Science Foundation of Xinjiang Uygur Autonomous Region (2021D01C035)

Author Contribution

Zhenhua Huang:A Kamale Tuokedaerhan: B Linyu Yang:C Chaozhong Guo:D Zhengang Cai:E Margulan Ibraimov:F Serikbek Sailanbek: GA: Writing – review & editing, Writing – original draft, Methodology, Investigation, Data curation. B:Supervision, Resources, Funding acquisition, Conceptualization.C: Supervision, Resources. D and E: Methodology, Formal analysis. F adn G: Resources.All authors reviewed the manuscript.

Acknowledgments

This research was supported by the Natural Science Foundation of Xinjiang Uygur Autonomous Region (2021D01C035)

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The performance of LaAlO x gate dielectric films prepared by sol-gel method at different temperatures of annealing

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Abstract

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Highlights

1 Introduction

2 Experimental procedure

2.1 Preparation of precursor solution

2.2 Deposition and annealing of thin films

2.3 Fabrication and Characterization of MOS Devices

3 Analysis

3.1 Microstructure analysis

4 Conclusion

Declarations

Funding

Author Contribution

Acknowledgments

References

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